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MAX14850
Six-Channel Digital Isolator
INSULATION AND SAFETY CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
VALUE
UNIT
IEC INSULATION AND SAFETY RELATED FOR SPECIFICATIONS FOR SOIC-16
External Tracking
(Creepage)
External Air Gap (Clearance)
Minimum Internal Gap
CPG
CLR
IEC 60664-1
IEC 60664-1
Insulation thickness
4.2
4.2
0.0026
mm
mm
mm
Tracking Resistance
(Comparative Tracking
CTI
IEC 112/VDE 030 Part 1
175
V
Index)
Insulation Resistance Across
Barrier
R ISO
1
G W
Capacitance Across
Isolation Barrier
C IO
f = 1MHz
12
pF
VDE IEC INSULATION CHARACTERISTICS
Surge Isolation Voltage
Repetitive Peak Isolation
Voltage
Rated Transient Isolation
Voltage
Safety Limiting Temperature
Safety Limiting Side A Power
Dissipation
Safety Limiting Side B Power
Dissipation
Apparent Charge Method
Overvoltage Category
Overvoltage Category
Climatic Category
Pollution Degree
V IOSM
V IORM
V IOTM
T S
P SA
P SB
q pd
IEC 60747-17, section 5.3.1.6 and 5.4.6 for basic insulation
IEC 60747-17, section 5.3.1.3
IEC 60747-17, section 5.3.1.4
IEC 60747-17, section 7.2.1
IEC 60747-17, section 7.2.1
IEC 60747-17, section 7.2.1
IEC 60747-17, section 7.4, method a and b
IEC 60664-1, single- or three-phase 50V DC or AC
IEC 60664-1, single- or three-phase 100V DC or AC
DIN VDE 0110, Table 1
1
282
850
+150
0.75
0.75
5
I, II
I
40/125/21
2
kV PEAK
V PEAK
V PEAK
° C
W
W
pC
—
—
—
—
Note 2: All units are production tested at T A = +25°C. Specifications over temperature are guaranteed by design. All voltages of
side A are referenced to GNDA. All voltages of side B are referenced to GNDB, unless otherwise noted.
Note 3: Guaranteed by design. Not production tested.
Note 4: The undervoltage lockout threshold and hysteresis guarantee that the outputs are in a known state during a slump in the
supplies. See the Detailed Description section for more information.
Note 5: The isolation is guaranteed for t = 60s, and tested at 120% of the guaranteed value for 1s.
Note 6: D V TOL = V OL – V IL . This is the minimum difference between the output logic-low voltage and the input logic threshold for
the same I/O pin. This ensures that the I/O channels are not latched low when any of the I/O inputs are driven low (see the
Bidirectional Channels section).
Note 7: The common-mode transient immunity guarantees that the device will hold its outputs stable when the isolation voltage
changes at the specified rate.
Note 8: Pulse-width distortion is defined as the difference in propagation delay between low-to-high and high-to-low transitions
on the same channel. Channel-to-channel skew is defined as the difference in propagation delay between different chan-
nels on the same device. Part-to-part skew is defined as the difference in propagation delays (for unidirectional channels)
between different devices, when both devices operate with the same supply voltage, at the same temperature and have
identical package and test circuits.
Maxim Integrated
6
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